1. Field of the Invention
The present invention relates to a method of manufacturing a dual gate oxide film and, more specifically to a method of manufacturing a dual gate oxide film capable of preventing film quality of a gate oxide film for high voltage from being deteriorated due to application of an NO annealing process.
2. Discussion of Related Art
In general, a technology for integrally implementing elements having different transconductances on a chip has been proposed, and such technology has been adapted to embody low-voltage driving elements and high-voltage driving elements.
When the high-voltage driving elements and the low-voltage driving elements were embodied simultaneously, an oxidation process was carried out two times to form a thick gate oxide film for high voltage and a thin gate oxide film for low voltage.
However, the low-voltage driving elements have required a high gate capacitance in order to maintain a stable element performance with a low driving voltage. In this regard, a technology for nitrifying gate oxide films of the low-voltage driving elements by using a Nitrogen-Oxygen (NO) annealing process in order to increase a dielectric constant has been studied.
As described above, dual gate oxide films of the high-voltage driving elements and the low-voltage driving elements to which the NO annealing process was introduced have been applied to various semiconductor devices, such as a DRAM, a SRAM, a NAND Flash, etc.
FIG. 1 is a cross-sectional view of an element illustrating a conventional method of manufacturing a dual gate oxide film.
Referring to FIG. 1, a semiconductor substrate 11 in which a high-voltage driving element region (HV) and a low-voltage driving element region (LV) are defined is provided. A first gate oxide film 12 is formed on a surface of the semiconductor substrate 11 in the high-voltage driving element region (HV) to be thick, e.g., with a thickness of about 350 Å, and a second gate oxide film 13 is formed on a surface of the semiconductor substrate 11 in the low-voltage driving element region (LV), including a surface of the first gate oxide film 12, to be thin, e.g., with a thickness of about 80 Å. Then, an NO annealing process is carried out thereto.
Because only the second gate oxide film 13 is formed in the low-voltage driving element region (LV) and the second gate oxide film 13 has a thin thickness, nitrogen fully diffuses up to the semiconductor substrate 11 during the NO annealing process, and thus, as shown in dotted line, nitrogen trap (NT) is formed to be homogeneous over the entire oxide film. As a result, a good quality NO gate oxide film for low voltage 13N is formed through nitrification of the second gate oxide film 13.
Because the first gate oxide film 12 and the second gate oxide film 13 are laminated in the high-voltage driving element region (HV) and the laminated gate oxide films 12 and 13 are thick, nitrogen does not fully diffuse up to the semiconductor substrate 11 during the NO annealing process, and thus, as shown in a dotted line, a nitrogen trap (NT) is formed not to be homogeneous over the entire oxide film. Moreover, when a cleaning process is carried out before forming the second gate oxide film 13, a portion of the first gate oxide film 12 can be recessed. In this state, when an oxidation process for forming the second gate oxide film 13 is carried out, an oxide is re-grown in the recessed portion, and then, Si—O—N bonding is formed through the NO annealing process. At that time, a nitrogen segregation phenomenon occurs in regions of the first gate oxide film 12, the regions being subjected to chemical attacks during the cleaning process, and thus Si—O—N defects (NS) are formed on a surface thereof. As a result, although the NO gate oxide film for high voltage 12N is formed through nitrification of the first and second gate oxide films 12 and 13, it is not possible to obtain a good-quality film.
As described above, when the NO gate oxide film for high voltage 12N and the NO gate oxide film for low voltage 13N are formed using the conventional method of manufacturing a dual gate oxide film, there occurs a problem that the film quality of the NO gate oxide film for high voltage 12N is deteriorated due to the nitrogen segregation phenomenon.